Defect density means a large die is disproportionately likely to contain a fatal flaw. Halve the die area and the share of good dies rises sharply, which is the original economic argument for chiplets.
Mixing nodes on purpose
Not every block benefits from the newest process. Analogue circuits, memory controllers and input-output do not shrink well, so vendors build those on a mature, cheaper node and reserve the leading node for the compute cores where density pays off.
The cost is interconnect
Crossing between dies costs energy and adds latency compared with staying on one piece of silicon. Package-level links, silicon bridges and interposers reduce that penalty but do not eliminate it, which is why latency-sensitive workloads can show inconsistent behaviour depending on which die a thread lands on.