Topic
Process nodes, CPU and GPU architecture, packaging, memory and the roadmaps behind them.
Logical qubits that improve as they grow are the field's key threshold. The major platforms have now shown it — which changes the conversation from 'whether' to 'how much hardware'.
The most advanced logic node in volume production is once again the tightest bottleneck in the chip industry, and early customers are paying record prices to be first in line.
Retail GPUs are selling at or below list price for the first time in years, even as datacenter accelerators remain allocation-only. The two markets have decoupled, and the split is diagnostic.
GPU-focused cloud providers went from curiosity to critical infrastructure in three years. The next phase is less glamorous: utilization, depreciation and the question of what a GPU hour is actually worth.
High-bandwidth memory is the binding constraint on AI accelerators, and the move to HBM4 changes who can make it, how it's packaged and what it costs.
Breaking processors into chiplets solved the economics of big dies. It created a new problem: every vendor's chiplets speak a different language, and the standard that could fix it is being tested by the market.
After a decade of promise, royalty-free RISC-V processors are showing up in real server silicon and cloud instances — close enough to x86 and Arm for evaluation, not yet close enough for default.
Five years after the CHIPS Act, new fabs are producing chips on American soil for the first time in decades — but the full picture includes construction delays, cost premiums and a workforce problem no subsidy solves quickly.
Intel's 18A node, pairing RibbonFET transistors with backside power delivery, is the company's attempt to rejoin the leading edge and anchor a US-based alternative to TSMC — and its yield trajectory is the most-watched number in American semiconductors.
The race to build AI accelerators has shifted the industry's binding constraint from how small a transistor can be printed to how many chips can be stacked, stitched and cooled inside a single package.
The gap between CoWoS supply and demand is narrowing as TSMC adds capacity, yet the company's own roadmap pushes its next-generation packaging tech out to 2030.
Leaks reported in April 2026 suggest Intel's Xe3P 'Celestial' architecture will not include a dedicated consumer gaming GPU, leaving the future of Arc discrete graphics uncertain even as the B-series remains on sale.
TrendForce data shows the memory industry's supply expansion still lagging demand, and analysts warn the shortage could persist for years rather than months.
A $500 billion-plus SK Group-Nvidia partnership includes a long-term memory pact, and SK hynix says it has already begun shipping 12-layer HBM4 ahead of a broader ramp.
The UALink Consortium has ratified four new specifications covering in-network compute, chiplets and management, but the group still has no shipping silicon built to its first-generation standard.
Samsung Foundry is nearing full utilization and has landed clients including IBM and Tesla, yet reports suggest a major Qualcomm order could slip to 2027.
Two chips at the same frequency can differ by more than 40 percent in real work. Here is what replaced megahertz as the useful figure.
AMD's new MI400 lineup separates a top-end MI455X for frontier AI labs from an MI430X aimed at sovereign and HPC customers, betting that open standards and ROCm software can win share from Nvidia.
Intel Foundry says a subset of its new Core Ultra Series 3 laptop chips are now in high-volume manufacturing using ASML's newest lithography tools, a milestone for both companies.
The March 2026 chips introduce what Apple calls Fusion Architecture, a faster interconnect meant to make multi-die Mac chips behave more like one part, plus per-core Neural Accelerators for on-device AI.
Nvidia says seven new chips built around the Rubin GPU and Vera CPU are now shipping in volume, aimed at the agentic-inference workloads that have replaced training as the industry's main talking point.
The company's N2 node moved into volume production this year and is already showing up in revenue, while capital spending climbs toward $64 billion.
Splitting a processor into several smaller dies improved yield and let vendors mix process nodes.
