Taiwan Semiconductor Manufacturing Co. said its 2-nanometer process, marketed as N2, began volume production at its Hsinchu facility this year, with Apple and AMD named as the first customers to ship chips on the node.

The company's second-quarter 2026 results, reported in mid-July, showed net income up 77.4% year over year to roughly NT$706.6 billion, with gross margin at 67.7%, and executives said the quarter included the company's first revenue tied to N2 wafers as AI and high-performance computing demand stayed strong.

Why it matters

N2 is TSMC's first node to use gate-all-around transistors, a structural change from the FinFET design used since 16nm, and it is the process most of the industry's flagship phone and AI chips are expected to move onto over the next two years. How quickly TSMC can scale it, and how much it can charge for it, sets the pricing and capacity backdrop for Apple, AMD, Nvidia and others through 2027.

The scale of the capital commitment also matters beyond Taiwan. TSMC's decision to add roughly $100 billion more for Arizona, bringing its total U.S. pledge to $265 billion, signals the company expects U.S.-based leading-edge capacity to be a permanent, not temporary, part of its footprint.

How it works

N2 keeps TSMC's FinFET-to-nanosheet transition on a two-year cadence and is being positioned as a multi-year platform: TSMC has also disclosed a performance variant, N2P, and industry reporting has TSMC targeting steep year-over-year growth in 2nm-class wafer output as adoption spreads faster than it did for the prior N3 node.

TSMC executives on the July earnings call said full-year 2026 capital expenditure would land between $60 billion and $64 billion, an increase from prior guidance, with the bulk still earmarked for advanced-node capacity including 2nm and the Arizona expansion.

The competing read

Coverage of the 2nm ramp has diverged on how fast yields are actually maturing. Some trade outlets reported yield figures that surprised analysts in a positive direction during the initial ramp, while others have focused on the fact that N2 still represented a small single-digit share of TSMC's total wafer revenue as of mid-2026, underscoring that volume production and meaningful revenue contribution are two different milestones.

There is also a live debate over customer sequencing: some reporting attributes Apple's early allocation to contractual priority rather than technical readiness, meaning AI-chip customers like Nvidia may not be first in line for N2 capacity even though they are the most vocal about wanting it.

What happens next

TSMC's own commentary points to accelerating 2nm-class wafer shipments through the rest of 2026 and into 2027, with N2P entering the mix as a drop-in upgrade for customers already committed to the base node.

The Arizona buildout, now covering at least four additional 2nm-capable fabs on top of earlier commitments, will be a multi-year construction and hiring story that intersects with U.S. trade policy on semiconductor tariffs and incentives, an area likely to keep generating headlines into 2027.