Every generation of AI accelerator has been, at bottom, a memory-bandwidth delivery vehicle. The compute die gets the keynote, but the HBM stacks around it determine how fast models actually run, and the supply of those stacks has dictated how many accelerators the industry can ship.
HBM4 is the generation where that relationship deepens: the base logic die under the memory stack moves from a memory process to a foundry logic process, pulling TSMC and other foundries into a product that used to belong entirely to the DRAM makers.
Why it matters
HBM is the highest-margin product the memory industry has ever sold, and it is allocated, not merely sold — accelerator makers commit years ahead. A supplier that misses the HBM4 window doesn't just lose revenue; it loses its seat in the AI supply chain for a product generation. That is why all three vendors are spending at levels that would have been unthinkable for a memory product cycle five years ago.
For buyers, the transition determines accelerator roadmaps: NVIDIA's and AMD's next platforms are designed around HBM4 capacity and timing, and any slippage propagates directly into system availability.
How it works
HBM stacks DRAM dies vertically, connected by through-silicon vias, on a base die that interfaces to the processor through a wide, short interconnect on a silicon interposer. HBM4's key change is doubling the interface width, which raises bandwidth per stack but demands finer pitch and better signal integrity — hence the move to logic-fab base dies and, at some vendors, more advanced packaging partnerships.
The manufacturing challenge is yield compounding: a 12-high or 16-high stack multiplies per-die defect rates, and the known-good-die problem gets worse with every layer. Thermal density rises in parallel, pushing packaging and cooling design into the memory vendor's problem set.
Evidence
All three suppliers have disclosed HBM4 sample shipments and qualification programs with lead customers, and JEDEC published the HBM4 standard's core parameters. Earnings-call commentary from the memory makers consistently describes HBM capacity as sold out through the coming year, with capital expenditure shifting decisively toward HBM lines at the expense of conventional DRAM.
The foundry angle is equally concrete: TSMC has publicly described producing HBM4 base dies on its logic processes for memory partners, a structural change in the industry's division of labor.
The competing read
One view holds that HBM4 cements the incumbents' oligopoly: the capital and customer-qualification barriers are so high that no new entrant can matter this decade. The opposing view notes that the base-die shift opens a door for foundries and custom-silicon players to reshape the stack — and that alternative approaches, from processing-in-memory to optical interconnect, get more attractive every time HBM pricing tightens.
What happens next
Watch qualification results through the next two quarters: yield reports, not announcements, will set the 2027 accelerator supply picture. Also watch custom HBM variants, where accelerator designers specify the base die's logic — the point where memory starts becoming part of the processor design rather than a commodity attached to it.